1 Interests

Hardware-Firmware Verification Root-of-Trust Applied Cryptography Side-channels Embedded Systems Computer Architecture

2 Education

University of Florida

Gainesville, FL, USA

Doctor of Philosophy, Computer Engineering

2021-Present

GPA: 3.95/4.0

  

University of Moratuwa

Moratuwa, SL

Honours Degree of Bachelor of the Science of Engineering

2015-2019

Specialisation: Computer Science and Engineering

Sub specialization: Integrated Computer Engineering

GPA: 3.74/4.0

3 Work Experience

Jan-May 2024

Synopsys Inc (DesignWare Group)

Embedded Systems Engineer | Research and development of Security Engine (Root-of-Trust) for the Automated Implementation of Secure Silicon (AISS) project, SoC IP integration, pre-silicon validation infrastructure and host utilities.

Jan 2021-Dec 2023

Embedded Systems Lab (University of Florida)

Graduate Research Assistant | Hardware security researcher (Research grants: SRC, NSF and DARPA).

Feb-Dec 2020

Intellisense Lab (University of Moratuwa)

Graduate Research Assistant | Register-transfer-level designer (Research grant: AHEAD).

June-Dec 2018

JLanka Power and Energy (Pvt) Ltd

Research Engineer | Power harvesting and optimizing regeneration process for lightweight hybrid propulsion systems, Real-time kinematics for sub centimeter-level accurate positioning of UAVs.

4 Academic Experience

Feb-Dec 2020

Teaching Assistant for CS4362: Hardware Description Languages

Department Of Computer Science and Engineering, University of Moratuwa

Feb-Dec 2020

Project Advisor for CS3282: Industrial Computer Engineering Project

Department Of Computer Science and Engineering, University of Moratuwa

5 Peer-Reviewed Journal Articles

[1]
Aruna Jayasena and Prabhat Mishra, “HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024.
[2]
Hasini Witharana, Aruna Jayasena, and Prabhat Mishra. “Sequence-Based Incremental Concolic Testing of RTL Models." ACM Transactions on Design Automation of Electronic Systems (TODAES) (2024).
[3]
Aruna Jayasena and Prabhat Mishra, “Directed Test Generation for Hardware Validation: A Survey", ACM Computing Surveys (CSUR), 2024.
[4]
Aruna Jayasena, Emma Andrews and Prabhat Mishra, “TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms" in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2023.
[5]
Aruna Jayasena and Prabhat Mishra, “Scalable Detection of Hardware Trojans using ATPG-based Activation of Rare Events", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.
[6]
Aruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana and Prabhat Mishra, “Network-on-Chip Trust Validation using Security Assertions", Journal of Hardware and Systems Security (HASS), 2022.
[7]
Hasini Witharana, Aruna Jayasena Andrew Whigham and Prabhat Mishra, “Automated Generation of Security Assertions for RTL Models", Journal on Emerging Technologies in Computing Systems (JETC), 2022.
[8]
Aruna Jayasena, “Register Transfer Level Disparity Generator with Stereo Vision", Journal of Open Research Software (JORS), 2021.

6 Conference Proceedings

[1]
Aruna Jayasena, Richard Bachmann and Prabhat Mishra, “EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves", Design Automation and Test in Europe (DATE), 2024.
[2]
Aruna Jayasena and Prabhat Mishra, “Design for Trust utilizing Rareness Reduction", International Conference on VLSI Design (VLSID), 2024.
[3]
Aruna Jayasena and Prabhat Mishra, “Towards Formal Verification of Hardware-Firmware Implementations", Semiconductor Research Corporation (SRC-TECHCON), 2023.
[4]
Aruna Jayasena, Khushboo Rani and Prabhat Mishra, “Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks", 40th IEEE International Conference on Computer Design (ICCD), 2022.
[5]
Aruna Jayasena and Prabhat Mishra, “Assertion-based Security Validation of Network-on-Chip Architectures", Semiconductor Research Corporation (SRC-TECHCON), 2022.
[6]
Hasini Witharana, Aruna Jayasena and Prabhat Mishra, “Automated Generation of Security Assertions for RTL Models", Semiconductor Research Corporation (SRC-TECHCON), 2021.

7 Books

[1]
A. Jayasena, S. Charles and P. Mishra, Chapter "Network-on-Chip Security and Trust Verification" in Network-on-Chip Security and Privacy, Springer, 2021.

8 Patents

[1]
Prabhat Mishra, Aruna Jayasena Ranhotige, Scalable Detection of Hardware Trojans using ATPG-based Activation of Rare Events, U.S. Provisional Patent Application No. 63/582,388, filed Sept 13, 2023.
[2]
Prabhat Mishra, Aruna Jayasena Ranhotige, Emma Andrews, Test Vector Leakage Assessment of Asymmetric Cryptography Algorithms, U.S. Provisional Patent Application No. 63/467,784, filed May 19, 2023.
[3]
S. Sooriyaarachchi, C. Gamage, C. de Silva, S. Pallemulla, S. Dharmaratna, S. Ranathunga, A. Jayasena, K. Ratnayake and S. Kahawala, “Computer Vision Based Multi‑spectral Automatic Fabric Quality Inspection Machine with Physical Color Referencing”, National ID LK/P/13468, Apr. 09, 2021.
[4]
S. Sooriyaarachchi, C. Gamage, C. de Silva, S. Pallemulla, S. Dharmaratna, S. Ranathunga, A. Jayasena, K. Ratnayake and S. Kahawala, “Method and Apparatus for Detecting Surface Defects”, PCT International Application PCT/IB2021/052945, Apr. 09, 2021.
[5]
S. Sooriyaarachchi, C. Gamage, C. de Silva, S. Pallemulla, S. Dharmaratna, S. Ranathunga, A. Jayasena, K. Ratnayake and S. Kahawala, “Method and Apparatus for Detecting Surface Defects”, National Patent LK/P/21709, Apr 08, 2021.

9 Preprints

[1]
Aruna Jayasena, Richard Bachmann and Prabhat Mishra “CISELeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes" Cryptology ePrint Archive, Paper 2024/932 (2024).
[2]
Sahan Sanjaya, Aruna Jayasena and Prabhat Mishra “Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability "arXiv preprint arXiv:2403.08132 (2024)
[3]
Yuntao Liu, Aruna Jayasena, Prabhat Mishra and Ankur Srivastava. “Logic Locking based Trojans: A Friend Turns Foe" arXiv preprint arXiv:2302.08984 (2023).

10 Posters

[1]
Aruna Jayasena and Prabhat Mishra, Efficient Activation of Stealthy Triggers in Hardware Trojans, GOMACTech Conference, San Diego, March 20-23, 2023.
[2]
Khushboo Rani, Emma Andrews, Aruna Jayasena and Prabhat Mishra, Defending Elliptic Curve Cryptography against Laser Fault injection Attacks, GOMACTech Conference, San Diego, March 20-23, 2023.

11 Talks and Guest Lectures

[1]
Systems Design, Verification and Validation: Guest Lecture (CS1050), University of Moratuwa, Department of Computer Science and Engineering, (2 May 2024)
[2]
Security Validation of Systems Implementations, PhD Forum, Design, Automation and Test in Europe Conference (DATA’24) (25 March 2024)
[3]
Hardware Verification and Validation: Guest Lecture (CS1050), University of Moratuwa, Department of Computer Science and Engineering, (8 June 2023)
[4]
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks: Talk, in IEEE International Conference on Computer Design (ICCD), Lake Tahoe, CA, (23 Oct 2022)
[5]
Assertion-based Security Verification of Network-on-Chips: Talk, in TECHCON 23 by Semiconductor Research Corporation (SRC), Austin, TX, (18 Sept 2022)
[6]
FPGA and Processor Design: Guest Lecture (CS2052), University of Moratuwa, Department of Computer Science and Engineering, (20 July 2022)
[7]
Future of Computer Engineering: Invited Talk, Organized by Athugalpura Leo Club, Sri Lanka, (21 Aug 2021)
[8]
Hardware Description Languages: Guest Lecture (CS4362), University of Moratuwa, Department of Computer Science and Engineering, (17 July 2021)
[9]
Drones and Future: Invited Talk, Robotics Club, University of Moratuwa, (30 Sept 2020)
[10]
Building Your Career as a Researcher: Invited Talk, ACM Chapter, University of Moratuwa, (10 Aug 2020)
[11]
Autonomous Drones in Past, Present and Future: Invited Talk, Leo Club, University of Moratuwa, Sri Lanka, (12 Sept 2018)

12 Professional Services

Reviewer

Design, Automation and Test in Europe Conference (DATE), 2025/ 2023

International Symposium on Hardware Oriented Security and Trust (HOST), IEEE, 2025/ 2023

International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), IEEE and ACM, 2024/ 2022

Journal of Cryptographic Engineering, Springer Nature, 2024

International Conference on Computer-Aided Design, IEEE and ACM, 2024

Computing, Springer Nature, 2024

The Journal of Supercomputing, Springer Nature, 2024

Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2022

Chairperson

Careers day : Computer Science Engineering department of University of Moratuwa , 2019

eSports gaming competition powered by gamer.lk hosted by Rotaract club of University of Moratuwa, 2017

Organizer

IESL RoboGames powered by Sri Lanka Telecom/Mobitel , 2017

13 Skillset

Languages:

Verilog | C | Rust | C++ | Python | Racket | Ruby | VHDL | C#

EDA Tools :

VCS | Yosys | Rosette | DC_shell | TetraMax | nextpnr | ISE | QEMU | Vivado | Quartus

CAD Tools :

Altium | KiCad | EasyEDA | EaglePCB | SolidWorks

Other :

LaTeX | Git | CI-CD | ROS | PX4 | RTOS | Jekyll | Docker | Zephyr OS | WolfSSL | ZcBor

14 Awards & Achievements

2024:

Gartner Group Graduate Fellowship 2024 - for outstanding CISE Ph.D. students by CISE-UF

2023:

Gartner Group Graduate Fellowship 2023 - for outstanding CISE Ph.D. students by CISE-UF

2022:

Gartner Group Graduate Fellowship 2022 - for outstanding CISE Ph.D. students by CISE-UF

2021-2025:

Full assistantship - for PhD program in Computer Science (CISE) from the University of Florida.

2018:

Million Worth Idea innovation Competition (e.i. Shark Tank) - for UAV hybrid propulsion system - 2nd runner up

2019:

Sky of Icarus Drone Competition hosted by IESL- Runner up

2015-2019:

Mahapola merit scholarship to pursue undergraduate studies by the government of Sri Lanka.

2017:

IEEEXtreme 11.0 Competition 10th place in Sri Lanka